METHOD AND DEVICE FOR MODULUS REDUCTION
Ключевые слова:
hardware encryption, asymmetric cryptoalgorithms, modular reduction.Аннотация
Is considered the possibility of accelerating one of the basic time-critical operations for the asymmetric cryptographic algorithm RSA - modulus reduction. The method for fast determination of residue of number
by modulus and its implementation offered. Is used the idea of increased module. Alternative methods of modulus
reduction are known, they require large hardware cost. Is developed device for modulus reduction, characterized by
high speed with optimal costs hardware. For the calculations used combinational circuits that are characterized by
high speed and low cost hardware. Is considered the step by step the work of device and the illustrative examples.
Device can be used in cryptoprocessors, in digital computing systems to accelerate the division operation, for
formation elements of finite fields, in computing systems using modular arithmetic.
